Nasdaq

Cadence Announces New Low-Power IP for PCI Express 5.0 Specification on TSMC N5 Process

Long-reach, high-performance PCIe 5.0 IP with ultra-low power consumption targets hyperscale computing, networking and storage applications SAN JOSE, Calif.--(BUSINESS WIRE)-- Cadence Design Systems, ...
Nasdaq

Cadence Accelerates Cloud Hyperscale Infrastructure with Third-Generation 112G-LR SerDes IP on TSMC’s N5 Process

DSP-based, flex-rate multi-rate SerDes IP is optimized for PPA for next-generation compute, switching, storage, AI/ML and 5G SoCs New architecture offers 25% power improvement, 40% area reduction and ...
The Globe and Mail

Cadence Introduces Industry’s Leading-Performance, Silicon-Proven 22Gbps GDDR6 IP at TSMC N5

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Cadence ® IP for GDDR6 is silicon proven on TSMC’s N5 process technology, exceeding Cadence’s previous 16Gbps designs. Targeted for ...
Design-Reuse

Cadence Introduces Industry's Leading-Performance, Silicon-Proven 22Gbps GDDR6 IP at TSMC N5

SAN JOSE, Calif.— November 16, 2022-- Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Cadence ® IP for GDDR6 is silicon proven on TSMC’s N5 process technology, exceeding Cadence’s ...
New Electronics

Cadence unveils low-power IP for PCI Express 5.0 specification on TSMC N5 process

Cadence Design Systems is making available IP supporting the PCI Express (PCIe) 5.0 specification on TSMC N5 process technology, expected to be taped out in early 2022 The IP consists of a PHY, ...