Adoption of RISC-V processors is accelerating. This technology, like everything, comes with benefits and risks. The open standard means freedom for many developers, but success depends on the ...

We were contacted by [morbo] to let us know about a project on the AdaCore blog that concerns programming a PicoRV32 RISC-V softcore with Ada. The softcore itself runs on a Lattice ICE40LP8K-based ...

CEVA-BX1 and CEVA-BX2 Audio DSPs and audio front-end software to be available through Intel Pathfinder for RISC-V ROCKVILLE, Md., Dec. 1, 2022 /PRNewswire/ -- CEVA, Inc. (NASDAQ: CEVA), the leading ...

The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...

This TechXchange examines various platforms the utilize the RISC-V instruction set and architecture. This includes boards and modules as well as chips. SiFive put one of its RISC-V designs on a ...

RISC-V is, like x86 and ARM, an instruction set architecture (ISA). Unlike x86 and ARM, it is a free and open standard that anyone can use without getting locked into someone else's processor designs ...

Our ability to continuously shrink the features of our silicon-based processors appears to be a thing of the past, which has materials scientists considering ways to move beyond silicon. The top ...

RISC-V is no longer content to disrupt the CPU industry. It is waging war against every type of processor integrated into an SoC or advanced package, an ambitious plan that will face stiff competition ...

China is ramping up its RISC-V ambitions with the launch of the Shanghai Open Source Computing Research Institute, unveiled at the 5th RISC-V Summit China on July 17, 2025. As the country's second key ...