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Simulate FPGA design with Vivado simulation libraries (unisim, etc)

YouTubeLukas Vik

Simulate FPGA design with Vivado simulation libraries (unisim, etc)

How to add Vivado simulation libraries to your FPGA simulation project using the tsfpga framework. Works for VHDL, Verilog and SystemVerilog. Works for open-source simulators (GHDL) and commercial simulators (ModelSim, Riviera-PRO, etc.). Libraries include unisim, unifast, unimacro, xpm, etc. Uses tsfpga and VUnit. Documentation: https://tsfpga ...

1.1K viewsMay 13, 2024

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